Day 7

Design and verify a 4-bit linear feedback shift register where the bit0 of the register is driven by the XOR of the LFSR register bit1 and bit3

Interface Definition

The module should have the following interface:

input     wire      clk,
input     wire      reset,

output    wire[3:0] lfsr_o

Coding Exercise

You're expected to code both the RTL and testbench for the problem. Your testbench should include the stimulus and checkers.

NOTE

The testcase will show PASSED as long as the RTL and testbench compile, but it doesn't imply that the implemented logic is correct.

If you're interested in learning more about RTL Design and don't want to worry about implementing the checks or the testbench code then I'd recommend the Hands-on RTL Design course. The course contains 25 RTL Design problems to help improve your design skills and comes with a 2-part video solution for every problem.

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