Switching Gears

Gearing Down

Gearter Complexity

Packing Up

Transformations

Threads and Memories

Drop the Garbage

Handling Traffic

Handling Traffic 2

More Statistics

Parser 1

Parser 2

Power Saving

Scatter And Gather

Setting Boundary

Smart Pipelines

Throttle Limits

Wider Range

Counting Time 1

Counting Time 2

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**PROBLEM STATEMENT:**  
NOTE: It is suggested that you attempt this problem after having solved the 'gearing_down' problem.

In your chip, the owner of the block feeding into the gearbox makes some modifications to their design. Now there is a FIFO block there which has a 2-cycle read latency. The gearbox needs to pull out its input data from this FIFO. You and the other designer agree that the ready_o output from your block can be used as the read_enable input to the FIFO. 

In summary, the input interface has changed from a push interface to a pull interface with some design specific constraints. 


![block](/gearter_complexity_blk.webp)


**Interface Definition**  
The module consists of two interfaces
