Hands-on RTL Design

Learn and practice design problems on QuickSilicon

Handpicked questions which would improve your digital design skills! The curated list of questions cover different aspects of RTL design and verification. These questions span across multiple concepts varying from beginner to advance level.

Buy Now

Course modules

Atomic Counters
EASY
Learn why single-copy atomic operations are useful
Divide by 3
EASY
Will these serial inputs ever stop?
3-bit Palindrome
EASY
Discover when FSMs can be dangerous
Sequence Generator
EASY
Can do without any inputs
Single Cycle Arbiters
EASY
Arbiters, every design needs one!
Events to APB
MEDIUM
Best way to learn about a protocol is to implement one
Low Power Channel
HARD
Understand why some signals are asserted low
Two Pulses
MEDIUM
Serial inputs can be confusing
Clock Generator
EASY
A flop can do a lot more
Skid Buffer
HARD
Isn't as easy as it sounds
Least Recently Used
HARD
The cache ways are parameterizable!
Edge Capture
EASY
You gotta have one
One Shot
EASY
The easiest of the lot
Parallel to Serial
MEDIUM
An interesting take on parallel-to-serial converters
Running Average
MEDIUM
Gotta maintain that average
Big Endian Converter
EASY
Not every device reads the bytes in same order
Credits & Deadlock
HARD
A complex design can have complex scenarios
Ordering
HARD
You have to maintain the order while maximizing perf
Performance Counter
EASY
A counter which resets on read? Sounds cool.
Asynchronous Resets
MEDIUM
You thought synchronization was enough? Try this
Fifo Flush
HARD
How will flush complete if input data never stops?
Buffering
HARD
Protocol conversions aren't that easy
Compression Engine
MEDIUM
Mantissa and exponent not always represent a floating point number
Perfect Squares
MEDIUM
Wait, what? We cant just multiply?
Cross correlation
EASY
A serial input stream can mean a lot of things?
System Verilog for Design
EASY
A guide to using System Verilog for Design!

QuickSilicon

Registered Office
Shop No. 56 Block P NIT 5 Faridabad, Haryana - 121001
CIN: U72900HR2021PTC094537
Telephone No: +91-8700725274

Hands-on RTL Design

Learn and practice design problems on QuickSilicon

Handpicked questions which would improve your digital design skills! The curated list of questions cover different aspects of RTL design and verification. These questions span across multiple concepts varying from beginner to advance level.

Buy Now

Course modules

Atomic Counters
EASY
Learn why single-copy atomic operations are useful
Divide by 3
EASY
Will these serial inputs ever stop?
3-bit Palindrome
EASY
Discover when FSMs can be dangerous
Sequence Generator
EASY
Can do without any inputs
Single Cycle Arbiters
EASY
Arbiters, every design needs one!
Events to APB
MEDIUM
Best way to learn about a protocol is to implement one
Low Power Channel
HARD
Understand why some signals are asserted low
Two Pulses
MEDIUM
Serial inputs can be confusing
Clock Generator
EASY
A flop can do a lot more
Skid Buffer
HARD
Isn't as easy as it sounds
Least Recently Used
HARD
The cache ways are parameterizable!
Edge Capture
EASY
You gotta have one
One Shot
EASY
The easiest of the lot
Parallel to Serial
MEDIUM
An interesting take on parallel-to-serial converters
Running Average
MEDIUM
Gotta maintain that average
Big Endian Converter
EASY
Not every device reads the bytes in same order
Credits & Deadlock
HARD
A complex design can have complex scenarios
Ordering
HARD
You have to maintain the order while maximizing perf
Performance Counter
EASY
A counter which resets on read? Sounds cool.
Asynchronous Resets
MEDIUM
You thought synchronization was enough? Try this
Fifo Flush
HARD
How will flush complete if input data never stops?
Buffering
HARD
Protocol conversions aren't that easy
Compression Engine
MEDIUM
Mantissa and exponent not always represent a floating point number
Perfect Squares
MEDIUM
Wait, what? We cant just multiply?
Cross correlation
EASY
A serial input stream can mean a lot of things?
System Verilog for Design
EASY
A guide to using System Verilog for Design!

QuickSilicon

Registered Office
Shop No. 56 Block P NIT 5 Faridabad, Haryana - 121001
CIN: U72900HR2021PTC094537
Telephone No: +91-8700725274