Introduction - RISC-V

Computer Architecture

RISC-V ISA

Introduction to YARP

YARP Fetch

YARP Decode

YARP Register File

YARP Execute

YARP Data Memory

YARP Control

YARP Branch Control

YARP Top

Assessment

# RISC-V Instruction Set Architecture

The video in this lesson introduces you to the RISC-V Instruction Set Architecture. The lesson
covers various different aspects of the ISA touching upong the RV32I Base Integer Set, Programmers
model, RV32 instruction listings, as well as provides a generic introduction to the ISA itself.

Understanding the ISA and its features is essential as that would help design the various features
which must be supported by the processor. After covering the ISA, we would dig into the  YARP Processor
which is discussed in the next section.
