Architecture
RISC (Reduced Instruction Set Computing)
A processor design philosophy emphasizing simple instructions that execute quickly, enabling pipelining.
Detailed Explanation
RISC principles include fixed-length instructions, load-store architecture (memory access only through load/store), many general-purpose registers, and simple addressing modes. This simplifies hardware, enabling faster clocks and efficient pipelining.
RISC contrasts with CISC (Complex Instruction Set Computing), which has variable-length instructions and memory operands in compute instructions. Modern CISC processors often decode complex instructions into RISC-like micro-operations internally.