Introduction - RISC-V

Computer Architecture

RISC-V ISA

Introduction to YARP

YARP Fetch

YARP Decode

YARP Register File

YARP Execute

YARP Data Memory

YARP Control

YARP Branch Control

YARP Top

Assessment

The branch control unit is the control unit for the branch instructions. If you notice the ALU
would be used for calculating the branch target address for the instruction but the branch taken
or not-taken decision still needs to be calculated. This is needed for all of the conditional
branches supported in the RISC-V ISA (see section 2.5 of the ISA). The unit would be responsible
for comparing the two operands and generating the branch taken output which would be used for
picking the branch target address as the next PC rather than picking the sequential PC.

## Branch Control
Before looking into the design requirements of the branch control unit, it is important to
understand the various branch type instructions. Please read the section 2.5 of the ISA
which details the control transfer instruction with a focus on the "Conditional Branches"
section.
