Architecture

Data Memory

The memory region that holds program data, accessed via load and store instructions in the memory stage.

Detailed Explanation

Data memory is where the processor's runtime state lives — the stack, the heap, and any global variables. Load instructions read from it into a register; store instructions write a register value back. The memory stage of the pipeline presents an effective address (usually `rs1 + imm`) plus a byte-enable mask derived from the access width (LB, LH, LW and their unsigned variants), and receives the data one cycle later.

Unlike instruction memory, data memory is read-write, which means it participates in the processor's hazard story. A store followed immediately by a load to the same address must either stall or be forwarded; misaligned accesses may need two memory transactions; and on cached systems, coherence protocols make sure that multiple cores see a consistent view. Even in a minimal single-cycle core, the load/store datapath — byte masking, sign-extending LB/LH, handling word alignment — is one of the trickier parts to get right.