Physical Design
Fan-Out
The number of gate inputs driven by a single gate output, affecting signal integrity and timing.
Detailed Explanation
Each driven gate adds capacitive load. High fan-out increases transition time, potentially causing timing violations. Buffer insertion increases drive strength to handle high fan-out.
Fan-out of 4 (FO4) is a common metric—the delay of an inverter driving four copies of itself. FO4 delay provides technology-independent timing comparisons.