Architecture
RISC-V
An open-source instruction set architecture based on RISC principles, free to implement without licensing fees.
Detailed Explanation
RISC-V defines a base integer ISA (RV32I, RV64I) with optional extensions: M (multiplication), A (atomics), F/D (floating-point), C (compressed instructions), V (vector), and more. Its openness enables academic research, custom implementations, and competitive ecosystem development.
The modular approach allows implementations ranging from minimal microcontrollers to high-performance application processors. Privileged architecture defines supervisor modes for operating systems.