Protocols
APB Protocol (Advanced Peripheral Bus)
A low-complexity AMBA protocol designed for low-bandwidth peripheral access with minimal power consumption.
Detailed Explanation
APB uses a two-phase transaction model: setup phase and access phase. In the setup phase, the master asserts PSEL and presents address and control signals while keeping PENABLE low. In the access phase, PENABLE goes high and the transfer completes when the slave asserts PREADY.
The protocol is intentionally simple—no burst transfers, no pipelining, and transactions cannot be back-to-back without an idle cycle. This simplicity makes APB ideal for configuration registers, control interfaces, and low-speed peripherals where throughput isn't critical.
Code Example
systemverilog
// APB Master State Machine
typedef enum logic [1:0] {
IDLE = 2'b00,
SETUP = 2'b01,
ACCESS = 2'b10
} apb_state_t;
always_ff @(posedge clk or negedge rst_n) begin
if (!rst_n)
state <= IDLE;
else case (state)
IDLE: state <= req_valid ? SETUP : IDLE;
SETUP: state <= ACCESS;
ACCESS: state <= pready ? IDLE : ACCESS;
endcase
end
assign psel = (state == SETUP) || (state == ACCESS);
assign penable = (state == ACCESS);