Architecture
Interrupt
An asynchronous signal that diverts processor execution to handle an event requiring attention.
Detailed Explanation
Interrupts enable responsive systems—the processor doesn't poll for events but is notified when they occur. Hardware interrupts come from peripherals (timer, UART, network). Software interrupts (traps, syscalls) are synchronous, triggered by instructions.
Interrupt handling involves saving context (registers, PC), identifying the interrupt source, executing the handler, and restoring context. Interrupt priority and nesting determine handling order when multiple interrupts occur.