Digital Logic
NAND Gate
A logic gate that outputs the complement of AND—low only when all inputs are high.
Detailed Explanation
NAND (NOT-AND) is functionally complete—any Boolean function can be built using only NAND gates. In CMOS, NAND is efficient: NMOS transistors in series, PMOS in parallel. A 2-input NAND uses 4 transistors.
NAND is often preferred over AND in implementation because AND requires an extra inverter stage (NAND + NOT). Fast paths may use NAND-NAND or NAND-NOR structures.