Digital Logic
Two's Complement
A signed number representation where negation is computed by inverting all bits and adding one.
Detailed Explanation
Two's complement represents signed integers with the MSB as a sign bit (0=positive, 1=negative). The range for N bits is -2^(N-1) to 2^(N-1)-1. Addition and subtraction use the same hardware for both signed and unsigned—the bits don't know they're signed.
Negation: invert all bits, add 1. -5 in 8-bit two's complement: 5 = 00000101, invert = 11111010, add 1 = 11111011 (-5). Overflow detection differs for signed vs unsigned.