Architecture
Atomic Operation
An operation that completes entirely without interruption, appearing instantaneous to other observers in the system.
Detailed Explanation
Atomicity ensures that multi-step operations happen as an indivisible unit. In hardware, this matters for read-modify-write sequences: reading a counter, incrementing it, and writing back must complete without another agent modifying the counter mid-operation.
Hardware support for atomics includes bus locking mechanisms, load-linked/store-conditional instructions (LL/SC), and compare-and-swap (CAS) operations. Cache coherence protocols must handle atomic operations specially to maintain correctness across multiple cores.