Control Unit
The combinational block that decodes an instruction's opcode into the control signals that drive the datapath.
Detailed Explanation
The control unit is the brain that tells every other block what to do on a given instruction. It takes the opcode and funct fields from decode and produces signals like `reg_write`, `mem_read`, `mem_write`, `alu_op`, `alu_src`, `branch`, and `jump`. Each of these gates or selects hardware in the datapath — enabling a register write, choosing an ALU input, routing the branch target back to the PC.
In a well-factored RISC-V core the control unit is split in two: a *main decoder* that looks at the opcode to pick the overall instruction class, and an *ALU decoder* that uses funct3 / funct7 to pick the specific arithmetic operation. Keeping control and datapath separate is what makes it easy to retarget the same datapath to a new ISA extension — only the decoder tables change.
Industry Context
On small cores the control unit is a pure combinational block; on larger cores it becomes a micro-op sequencer driving a wide issue queue, and is the hardest block to formally verify.