Architecture

Program Counter

A register that holds the address of the next instruction to be fetched.

Detailed Explanation

The program counter (PC) is the processor's pointer into its instruction stream. Every cycle it feeds instruction memory to fetch the next instruction, then advances — by four bytes in a 32-bit RISC-V core, or by one instruction width in general — unless a branch, jump, or exception redirects it. Because the PC is read and written every cycle, it's almost always a dedicated architectural register rather than part of the general-purpose register file.

Designers treat the PC as a small but critical piece of state. Branch prediction writes a speculative PC before the branch resolves; exceptions save the faulting PC so the handler can return; JAL/JALR instructions compute `PC + 4` as a return address. In pipelined designs there is usually a distinct PC value for each pipeline stage, connected through the pipeline registers.

Industry Context

The PC is often the most-toggled register in the core; its fan-out and timing shape the critical path of the fetch stage.

Code Example

systemverilog
// PC with branch / jump redirection
module pc_reg (
  input  logic        clk, rst_n,
  input  logic        redirect,
  input  logic [31:0] target,
  output logic [31:0] pc
);
  logic [31:0] pc_q;
  always_ff @(posedge clk or negedge rst_n)
    if (!rst_n)        pc_q <= 32'h0;
    else if (redirect) pc_q <= target;
    else               pc_q <= pc_q + 32'd4;
  assign pc = pc_q;
endmodule